With the advances in the semiconductor industry and associated technology innovations, feature sizes of semiconductor devices are becoming smaller and smaller. As the horizontal or lateral dimension of a device continues to shrink, the vertical dimension (i.e., the device depth) is also being reduced proportionally. Particularly, after passing the 65 nm technology node, the source/drain regions and the source/drain extensions are required to be become shallower accordingly. Doped junctions with a junction depth of less than 100 nm is usually referred to as an ultra-shallow junction (USJ). Ultra-shallow junctions can improve the short channel effect of the device. As ultra-shallow junctions become shallower and shallower, how to resolve the conflict between reducing serial parasitic resistance and further decreasing the junction depths for the ultra-shallow junctions becomes a main challenge faced by ultra-shallow junction technologies.
Conventionally, ion implantation technology is usually used to form ultra-shallow junctions, such as highly doped source/drain regions of a metal oxide semiconductor (MOS) transistor. Using the gate structure as a mask, PN junctions can be formed by implanting N-type or P-type dopants into the semiconductor substrate. A metal film can be subsequently deposited, followed by annealing, during which metal silicide is formed, and wet etching is then used to remove any excess or remaining metal. As the transistor size shrinks, the gate length also decreases. With the continually decreasing gate length, the source/drain and source/drain extension regions need to become more and more shallow accordingly.
Currently, ultra-low energy ion implantation and millisecond laser annealing technologies are used to form ultra-shallow junctions. In the future, the junction depth of ultra-shallow junctions in semiconductor field-effect transistors can become smaller than 10 nm. Because of the immense challenges faced by the ultra-low energy ion implantation technologies and the generally occurring dopant diffusions during annealing and dopant activation, using conventional ultra-low energy ion implantation and annealing technologies to form ultra-shallow junctions suitable for field-effect transistors of future technology nodes shall face insurmountable challenges.